Tech Insider: Optimizing Nanoscale CMOS RFICs
"On Demand"
Presenters:
Lawrence Williams, Ph.D.,
Business development director, Ansoft Corporation
Albert Yen, Ph.D.,
Mixed mode and radio frequency technology manager, UMC Corporation
Ron Schneiderman
Author, The Mobile Technology Question & Answer Book — A Survival Guide for Business Managers and Technology Lost — Hype and Reality in the Digital Age
Contributing Editor, Electronic Design and Vision magazines
Founding Editor, Wireless Systems Design magazine
Industry experts will explore the latest challenges and rewards of migrating to the nanometer regime, including new solutions for nanoscale design. Better power-to-performance ratios, higher levels of integration, and systems-on-a-chip (SOC) technology are motivating designers to implement circuits at the 90nm node and below. Although scaling to this new process enables greater performance, new risks which impact RF, analog, and high-speed circuit design are introduced.
Recent nanoscale design solutions will be discussed, including a novel dynamic design kit (DDK) that can be used by engineers to rapidly modify layout parameters, circuit elements, and packaging to accurately predict the electrical performance across component, circuit, and system design. Via a live demo, attendees will learn how to utilize the DDK to optimize RFIC designs for power, linearity, density, and cost. Significant effects from high-frequency packaging and on-going work at Ansoft and UMC for IC/Package/PCB Co-design will also be presented.
Who should attend. Technology professionals in:
- Circuit design
- Foundry modeling
- Product design
- Project engineering
- Engineering management
Register now for this Webinar!
http://w.on24.com/r.htm?e=44647&s=1&k=0A000FF6A989AC116FF07AC7F11CC22B
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