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The High-k Solution Continued By Mark T. Bohr, Robert S. Chau, Tahir Ghani, and Kaizad Mistry

First Published October 2007
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Illustration: Bryan Christie Design

BUMPY RIDE: The particular density of electrons in a traditional polysilicon gate allowed inherent vibrations in the high-k dielectric to move into the transistor channel and disrupt the flow of current.The higher density of electrons in a metal screened out the vibrations, allowing current to flow more smoothly.

Now our engineers had a new major chore: find a metal they could use for the gate electrode that would combine well with the new high-k dielectric. Because the electrical characteristics of the gates of NMOS and PMOS transistors are different, they actually needed not one metal but two—one for NMOS and one for PMOS.

Just as standard MOS transistors use n-type and p-type polysilicon gates for NMOS and PMOS transistors, high-k transistors would need metal gate electrode materials with a key property similar to polysilicon's. This key property is known as the work function. In this context, work function refers to the energy of an electron in the gate electrode relative to that of an electron in the lightly doped silicon channel. The energy difference sets up an electric field that can modulate to the amount of voltage needed to begin to turn the transistor on, the threshold voltage. Unless the gate's work function is chosen well, the threshold voltage will be too high, and the transistor will not turn on easily enough.

We analyzed, modeled, and experimented with many types of metals, some with work functions that more closely matched highly doped silicon than others. But by themselves, none had exactly the work function of the doped silicon, so we had to learn to change the work function of metals to suit our needs. Eventually, the research group identified NMOS and PMOS metals by first building capacitors out of them and then transistors. We cannot disclose the exact makeup of our metal layers, because after all, the IC industry is very competitive!

We built our first NMOS and PMOS high-k and metal gate transistors in mid-2003 in Intel's Hillsboro, Ore., development fab. We started out using Intel's 130-nm technology, which was about three years old at the time and was used in high-volume production. The transistors, with a hafnium-based oxide and metal gate electrodes, had everything we needed: they turned on at the right voltage, leaked little current through the gate oxide, and passed a large amount of current through the channel for a given voltage. And that current moved quickly. In fact, for a given off-state current, these first transistors drove more current than any transistor reported at the time.

Of course, we weren't alone. And there were still plenty of unknowns. By 2003, researchers in university labs and other semi­conductor firms around the world had zeroed in on ­hafnium-based materials as the gate dielectric. A variety of them were under earnest study: hafnium oxides, hafnium silicates, and hafnium oxides containing nitrogen. The method of forming the high-k film, too, was unsettled, with different groups trying sputtering, chemical vapor deposition, and atomic layer deposition, which we eventually settled on. But the biggest unknowns at the time were what metal gate materials to use and how to fit them into the transistor-manufacturing process.

The normal fabrication method is known as “gate first.” As the name implies, the gate dielectric and gate electrodes are constructed first. Then the dopants for the source and drain are implanted into the silicon on either side of the gate. Finally, the silicon is annealed to repair the damage from the implantation process. That procedure requires that the gate electrode material be able to withstand the high temperatures used in the annealing step—not a problem for polycrystalline silicon but potentially a big one for some metals.

To make a long story short, the search for gate electrode materials with both the right work function and tolerance to high-temperature processing was very difficult and full of dead ends. Especially for the PMOS transistor.

Another transistor process sequence, dubbed “gate last,” circumvents the thermal annealing requirement by depositing the gate electrode materials after the source and drain are formed. However, many of our peers saw the gate-last process, which we ultimately adopted, as too much of a departure and too challenging.

Meanwhile, a third approach remarkable in its simplicity emerged. Called fully silicided gates, it lets you follow the normal gate-first process but then lets you turn the polysilicon gate into a metal-silicide gate, essentially replacing every other silicon atom with metal (usually nickel). Then, by doping the nickel silicide, you can alter its work function for use in either an NMOS device or a PMOS one. By late 2006, though, nearly everyone, including us, had given up on the fully ­silicided gates approach. No one could move the silicide's work function quite close enough to where it needed to be.

Nevertheless, the search goes on at other major chip makers to find the materials with the right work ­function that could survive high temperatures and enable the industry standard gate-first process flow.


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