Another attractive feature of single-wafer processing equipment is the use of sensors inside the machines to measure important parameters, such as wafer temperatures, gas densities, and reaction rates. These sensors relay information to a database and allow software to adjust, in real time, any parameters that may have strayed from their nominal values.

Batch equipment, on the other hand, uses monitor wafers that run either ahead of or alongside the circuit wafers. On these monitor wafers are circuits that allow engineers to measure line widths, line spacings, wire resistances, and other circuit features. After the process step ends, the monitor wafers are taken out and their various circuits are measured. Engineers use the information to make adjustments for the next batch of wafers to move through that piece of equipment.

Some single-wafer processing steps, notably lithography, also use monitor wafers. But the sensors used in other single-wafer steps let technicians make adjustments to properties like wafer temperatures and gas concentrations on the fly. It gives them better control of manufacturing conditions and yields wafers with less variation from chip to chip and from wafer to wafer.

The economic advantages of single-wafer processing extend beyond the chips themselves. Even the equipment itself is much smaller physically than that used in batch processing. For example, a state-of-the-art facility that produces ICs on 300-mm wafers and produces 25 000 wafers per month might occupy 10 000 to 20 000 square meters of floor space. Of that area, batch-processing equipment would take up 1200 m2. The area taken up by the equivalent single-wafer processing equipment is only 600 m2 [see graph, "Saving Space"]. The smaller area means that building the facility costs less, and many operating expenses—such as lights, air purification, and temperature control—also are significantly lower. The equipment itself costs slightly less as well—about 6 percent less—for single-wafer processing than for batch processing, but that 6 percent represents millions of dollars. In an era when it costs between $2 billion and $3 billion to build a semiconductor manufacturing plant, even a savings of a few percent matters.

Single-Wafer Processes are becoming important in packaging chips as well as in building the wafers. Today many packaging operations still use large wet benches to clean debris—small particles of wiring metal or insulation—from the surface of large batches of wafers. But fab facilities—particularly advanced ones—are increasingly turning to single-wafer cleaning equipment for the packaging process. The leading manufacturer of single-wafer cleaning equipment is The Sez Group, Zurich, Switzerland. Applied Materials Inc., Santa Clara, Calif., also offers a machine for cleaning individual wafers during transistor formation.

A packaging technique called wafer-level packaging is increasingly common among chip makers. It is a step toward single-wafer processing, because it makes it possible to do the cleaning steps and to build connections between the package and the chip, and among chips in the package, in a single-wafer fabrication facility. It may seem obvious enough, but in fact this bucks tradition in the industry; most wafers today are shipped to remote locations for packaging, which can add weeks to the manufacturing process.

To sum up, the three main business advantages of single-wafer processing—faster time to market, smaller inventory, and lower manufacturing cost—are starting to improve chip makers' ability to manage their supply chains and better deal with the boom and bust cycles that have long plagued the industry.

Faster time to market is possible because it takes less time for wafers to make it through the fabrication process. The three months it takes to make a wafer full of chips with batch-process equipment can be reduced to less than a month with a pure, or nearly pure, single-wafer setup.

For chip makers, these advances are overdue. The glut of memory and logic chips that even now continues to affect the market can be blamed, at least in part, on making wafers in large batches. This perennial chip overabundance has long depressed chip prices. So while the number of chips sold in the first three years of this decade climbed steadily from 300 billion in 2001 to 360 billion in 2003, revenues stayed relatively flat, at about $160 billion per year. In other words, manufacturers have been selling more chips, but they have not been making any more money [see graph, "Where It Hurts"].

This past year of 2004 saw some good news for the industry: record-breaking revenue of $214 billion—28 percent higher than that of 2003, according to the Semiconductor Industry Association, in San Jose, Calif. But the bad news is that revenues will not grow significantly in 2005. Chip prices are again dropping because of chip oversupply. In a report published in November 2004, iSuppli analysts predicted that 2005 chip prices would fall in most categories of ICs, from memory chips to standard logic circuits.

The complexity of IC manufacture grows with each new generation of semiconductor technology. On-chip wire widths shrink. New techniques and new materials, both insulators and conductors, come into the mix. The cost of building a semiconductor fabrication facility continues to skyrocket. Before too long, single-wafer manufacturing will not be merely an alternative, it will be a necessity. We believe that within three to five years all manufacturers will be using single-wafer processing exclusively to make transistors and interconnecting wires. They will inevitably adopt single-wafer packaging universally in the following years.

To Probe Further "Special Section on Single-wafer Manufacturing in Nanochip Era," by Rajendra Singh et al., in IEEE Transactions on Semiconductor Manufacturing, Vol. 16, May 2003, pp. 90-178, gives technical details of the single-wafer approach.

"Dominant Role of Single Wafer Manufacturing in Providing Sustained Growth of the Semiconductor Industry," by Rajendra Singh et al., in Semiconductor Fabtech, 19th edition (Henley Publishing, London), 2003, pp. 85-93, describes the importance of single-wafer manufacturing.

In "Limits of Integrated Circuit Manufacturing," Proceedings of the IEEE, Vol. 89, March 2001, pp. 375-93, Robert Doering and Yoshio Nishi explore the processing pitfalls of semiconductor manufacturing.