The pattern forms when the light passes through a glass mask patterned with chrome. The exposure of the photoresist to light changes its solubility, so when the wafer is rinsed after exposure, some of the photoresist washes away. What remains is the pattern of transistor areas in photoresist on the wafer. This step, called lithography, is repeated at almost every stage of manufacturing, building up the transistors, and therefore the chip, layer by layer.

Next comes a step called ion implantation, which infuses the wafer with certain ions, typically arsenic or boron, in the areas where the photoresist has been removed. These ions are called dopants, because their presence changes the transistor's electrical properties, for example, its resistance or the voltage that must be applied to the gate to turn it on.

The next task is to build the gate. A thin layer of silicon dioxide insulation is grown to electrically isolate the gate from the channel. This step typically occurs in a large furnace that heats the wafers in an oxygen-rich environment. The top of the layer is infused with nitrogen to provide a physical barrier to the passage of impurities from the gate into the silicon dioxide. Then polycrystalline silicon is deposited over the entire wafer.

The next step takes the wafer back to lithography, where the same process of exposure of photoresist through a mask, followed by rinsing, leaves photoresist covering the regions where the transistors' gates are to reside. The lithographic step is followed by an etching step, in which ions, bombarding the polycrystalline silicon surface, wear away all the polycrystalline silicon material not covered with photoresist. The polycrystalline silicon gates remain after the protective layer of photoresist is removed.

After gate formation comes another ion-implanting step, this time to adjust the electrical properties of the source and drain, and then annealing, in which the wafer goes either back into the furnace or into a single-wafer annealing machine, enabling the ions to move into the proper locations in the material.

Making the wires that connect the transistors into circuits is the final step in the formation of the ICs on the wafer. The chip may have as many as nine levels of wires, which are all formed the same way. First an insulating material is deposited onto the tops of the completed transistors. Then trenches are etched into the insulator and filled to overflowing with metal—usually tungsten or copper. Polishers grind down the metal until it is level with the top of the insulation. These metal structures form the links, or vias, that will connect the wiring to the transistors. A second layer of insulation is deposited on top of the vias, and it too is etched into the desired wire pattern. Then copper is deposited and polished down to be even with the second layer of insulation, forming the first level of metal wiring. This process, called chemical-mechanical polishing, uses both physical grinding and a solution of chemicals to grind the metal to the right level.

Once the circuits are completely built, the wafer moves on to testing and packaging. For packaging, the wafer is sliced up into individual die. The chip is enclosed in an airtight package, with electrical pads on the die connected to the familiar leads protruding from the package.

In today's typical fab facility, the single-wafer steps include lithography, chemical-mechanical polishing, and the material deposition used in wiring the transistors. But some thermal processing steps, like silicon dioxide growth, the infusion of nitride into the gate insulation, and annealing are done in batches of as many as 200 wafers in large furnaces. Periodically, throughout manufacturing, the wafers need a cleaning to clear away debris that may have accumulated during previous manufacturing steps. Some of the cleaning steps dip the wafers into a wet bench, a reservoir filled with a cleaning liquid. Wet benches also handle wafers in large batches.